- Small, complete, all-in-one JTAG programming/debugging solution for Xilinx FPGAs and SoCs
- Plugs directly into standard Xilinx JTAG header
- Separate Vref drives JTAG signal voltages; Vref can be any voltage between 1.8V and 5V
- High-Speed USB2 port that can drive JTAG bus up to 30Mbit/sec (frequency adjustable by user)
- Compatible with Xilinx ISE 14.1 and newer, Xilinx Vivado- 2013.3 and newer
- Uses USB Micro-B connector
- Open drain buffer on pin 14 allows debugging software to reset the processor core of Xilinx's Zynq platform
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