74HC139D,653 - Dual 2-4 Line Decoder/Demultiplexer SMD SO16

The 74HC139; 74HCT139 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to nY3). Each decoder features an enable input (nE). When nE is HIGH all outputs are forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.